This is a consequence of a bug in PCB123 that is encountered when a pin is connected to a net on the schematic that is marked as “Do Not Optimize” in the layout’s “Edit Properties/Edit Nets” dialog.
When the “Do Not Optimize” flag is set on a net, PCB123 will actively attempt to not modify a net’s rats nest lines from the state they are placed in by the user. Unfortunately, the synchronize code was respecting that flag when a connection was made in the schematic to a net that was tagged as “Do Not Optimize”, and hence wasn’t creating a rats nest line in the layout for the new connection just made in the schematic.
A quick way to fix the problem is to select all of the nets with a “Do Not Optimize” flag set (you could simply select all of the objects on the board), right click on “Properties” and when the “Edit Properties” dialog appears, select the “Nets” page. On that page, click the “Do Not Optimize” checkbox if it is checked to clear it. If it is not checked, click it to check it, and then click it again to uncheck it. Then press “Apply” and then close the dialog. Next go to the main menu, click on “Design/Optimize Net Lengths”. All of the missing rat’s nest lines will appear.
The bug will be fix in the next release of PCB123, version 220.127.116.11, when it is made available.