Sunstone Printed Circuit Board Forum

If you need to add shielding around nets or generally make other nets as wide as possible a simple method to do this is to add copper pour regions to your design. Simply draw a filled polygon that has been assigned to a net. Objects that are contained within the filled polygon region that do not belong to the filled polygons net will be isolated from the copper region. Those that are assigned to the same net will be tied to the copper region. In the picture below, NET1 is surrounded by a copper pour that has been assigned to the GND net. Copper pour does not flood over anything that has a different net property than itself. Even pins that do have the same net property as the copper are cleared out and tied to the copper through ?spokes to help soldering by focusing the heat on the pin.
The default isolation gap between copper pour and other objects is 0.008 for standard 1oz copper clad and 0.013 for 2.5oz copper clad boards. This clearance may be increased on certain objects whose net spacing rule dictate a greater clearance, including the copper pour net itself. By specifying worst case spacing on grounds and voltages, copper pour can be safely used while guaranteeing adherence to standards and regulation bodies requirements such as Underwriter Labs (UL). Care must be taken when adding copper pour to congested areas so that pins are not isolated. Pins that belong to the same net have connection lines, or a ratsnest between them. The connection lines disappear when: A continuous routed path is completed between the pins. The pins net is assigned to a plane layer and the pins hit the plane layer through a plated hole. The pins are contained in a copper pour region assigned to the same net.

Because the display of the ratsnest is calculated on the fly, connections made with copper pour are assumed to be complete. However, this may not always be true. It is possible to isolate pins by carving up the copper pour region with too many other-net objects. Running a full DRC check on the board will detect possible isolations and the resulting error markers should be investigated carefully. The DRC check for isolations is pessimistic. First, It rasterizes the copper region at some minimum feature size so a pin might be flagged as isolated even though it may be connected by one or more slivers smaller than 0.004. Second, the isolation check is performed on a per-copper pour basis without regard to the rest of the net topology. This means that two pins inside a copper pour region of the same net may be reported as isolated even though they are connected by a different means such as another copper pour region on a different layer or even a plane layer. This may be corrected in the future but is currently considered beyond the scope of the software.

An example of isolated pins and the corresponding DRC error marker is shown below. Note that only one pin is reported as isolated as the other is considered connected to the copper. Only the smallest number of isolated pins is reported by the DRC. The largest connected set of pins is not reported as isolated to reduce the number of error markers generated. You can also add solid regions of copper that do not clear anything out by simply leaving the net property blank.

The isolation (spacing) is a net property. Right click and select properties on a trace or ratsnest line that belongs to the net you want to modify. On the nets tab set the desired spacing value.

Hi, as mentioned above, the default isolation is 0.008 for standard 1oz copper. Where can I change this setting?