Software Notes I've taken

[daduggan]

I have been using your software since version 1 for PCB Prototypes . I stayed with version 2 for a long time since the parts list was slim to none and now moved to version 4. I’m not a pro but I have been using the current software (4.1.19.0) every day for several months and the following is a list of things I’ve come across. I under stand about programming and some times due to the nature of the design thing can’t be changed. I also realize layouts are all moving to surface mount but there is still a need for thru-hole as well. The current LIB contains almost all SMT and I end up creating from scratch or modifying something close to what I need and adding it to my LIB.

LAYOUT:
1. As others have complained, when changes are made in the schematic resulting in the removal of traces in the layout it requires time to replace missing traces. What about marking the spots with DRC/ERC points leaving the traces in place and allows the user a chance to do a manual fix. Changes will always be need and the time wasted in rerouting traces is frustrating.

2. On several occasions when doing a lot of text changes the text being placed by the pointer is not the actual text shown in the text properties box. It appears to be text from a previous edit and is fixed by closing the file and/or program and reopening it.

3. When trying to copy an entire layout to make a duplicate copy for a 2 up layout all the components grid-locking points are off by a small amount requiring the grid to be set very small to adjust the placement of the duplicate copy in the correct place. The same is true when rotating a group of objects. Can a form of re-grid be added to scan the layout and move all objects to the closest current grid point setting and also be able to right click on an object to select re-grid just that object?

4. After setting the default trace width in the preferences it seems to only work a few times then it changes back to some default small size not the default I set in the preferences and saved as the default.


SCHEMATIC:
1. When moving a part the automated rerouting of wires results in a spider’s nest of wires and is time consuming moving the wires back to a neat format. Can this be set to be limited to a rubber banding leaving the current wires in place and adding the rubber band lines to the part so we can make our own wire moves? Too much automation can lead to confusion.

2. When moving a wire the connection dot where the wire is does not move with the new connection point. To move it I have to delete the wire and re-draw it resulting in the removal of the layout trace on the board. This is also true with the “port pins” if they are in one spot on the wire and moved to a new location for clarity the connection point doesn’t move. So my drawings end up with connection dots in the wrong spot and others not showing where the actual connection point is located.

3. Can you add a way to hide the net port designators on an individual basis? I like assigning net names but don’t like the designators on the drawings.

4. When moving from layout to schematic each should have there own setting for grid lines / dots. When I set the layout to grid lines I don’t need lines when in the schematic so I have to keep turning them on/off.

5. When trying to change a property setting on a part which has several sections like a 7400 logic chip there is an error stating the “_REFDES” is in use, this is because each section uses the same reference with an appended letter. This error needs to be removed or fix it so when the subsection is added it appends the letter to the part’s property “_REFDES” and not just append the letter on the screen.

6. Not sure if there is any size stipulations when the part symbols are created but I have noticed some appear to be created larger then necessity, as in a SPST switch that is 10 units long and could have been 6-8 making it look larger then needed. I have no problem making and modifying parts but I then have to keep the parts LIB in sync on 2 computers.

7. A lot of the parts have dual numbers on the pins. The 7402 NOR chip for example has a 1,2,3 for the logic gate and 4,5,6 for the pins. One of the logic gate numbers (3) is sitting where the circle for the NOR output marking belongs, covering it up so it looks like a OR gate on the drawing. How can these be hidden on a global basis?.

8. I have selected connectors like a 20 pin dual inline .100 connector and found that it had the odd and even numbers on the wrong side compared to a standard plug resulting in a redesign after inspection. I placed a MCU and found the pin designations were not in the standard order as on the actual chip. A chip is numbered in a circular pattern around the chip but the symbol was 1-9 top to bottom on the left then 10-18 top to bottom on the right causing confusion when comparing it to the manufactures drawing. I guess I assume too much even on the simple things to be right.

9. Is there a list of predefined macros for things like setting the date in the schematic LAST REVISION date field? The layout drawing automatically displays the current date every time it is printed and I’d like to be able to have it in the schematic also, even the current time if needed.

10. Why can’t “port pins” and nets be combined on the schematic side like in the layout side? Why can’t I drop a “Port Pin” with the same name as a net and have the two become one? Such as when in the layout I assign a pin to GND port then go to the schematic side and drag the port to the net GND and get “ two ports not allowed”? It’s the same net since it was connected in the layout.

Bill of materials:
Can this section be configured to choose which fields are included?

[Sal Hernandez]

LAYOUT:
1. As others have complained, when changes are made in the schematic resulting in the removal of traces in the layout it requires time to replace missing traces. What about marking the spots with DRC/ERC points leaving the traces in place and allows the user a chance to do a manual fix. Changes will always be need and the time wasted in rerouting traces is frustrating.

This issue has been greatly improved compared to early releases. If you have specific example to report please send us steps to reproduce the issue and I will report the specifics to our development team.

2. On several occasions when doing a lot of text changes the text being placed by the pointer is not the actual text shown in the text properties box. It appears to be text from a previous edit and is fixed by closing the file and/or program and reopening it.

I have not experienced this issue in v4.1.19. Could you provide steps to reproduce.

3. When trying to copy an entire layout to make a duplicate copy for a 2 up layout all the components grid-locking points are off by a small amount requiring the grid to be set very small to adjust the placement of the duplicate copy in the correct place. The same is true when rotating a group of objects. Can a form of re-grid be added to scan the layout and move all objects to the closest current grid point setting and also be able to right click on an object to select re-grid just that object?

I will submit this feedback to development. The PCB123 is really setup to create a single pcb not panels.

4. After setting the default trace width in the preferences it seems to only work a few times then it changes back to some default small size not the default I set in the preferences and saved as the default.

PCB123 does not have a default trace width setting. This feedback has been submitted to our development team. The default default drawing width does not actually change and net width settings. If you are working without a schematic and set the default drawing width in the board configuration, each trace you draw to use the width set in the user preferences. If you have ratsnest lines on your layout. Those rats nest lines default to a net width of .007". If you want to set a default net width and you have nets on the layout already. Drag a box around the entire layout, right click on any object and select properties. Here you can select the nets tab and set the net width value. This will only change the net width for the selected nets. Any new nets on the board will be set to the default .007".

SCHEMATIC:
1. When moving a part the automated rerouting of wires results in a spider’s nest of wires and is time consuming moving the wires back to a neat format. Can this be set to be limited to a rubber banding leaving the current wires in place and adding the rubber band lines to the part so we can make our own wire moves? Too much automation can lead to confusion.

I will submit this feedback to our development team. We tried this in a previous release but had to pull it. This is a good idea.

2. When moving a wire the connection dot where the wire is does not move with the new connection point. To move it I have to delete the wire and re-draw it resulting in the removal of the layout trace on the board. This is also true with the “port pins” if they are in one spot on the wire and moved to a new location for clarity the connection point doesn’t move. So my drawings end up with connection dots in the wrong spot and others not showing where the actual connection point is located.

In this situation you are also able to move the connection point. Drag a box around the connection point and the group of wires along with the connection point. You can then move the connection point to the desired location.

3. Can you add a way to hide the net port designators on an individual basis? I like assigning net names but don’t like the designators on the drawings.

4. When moving from layout to schematic each should have there own setting for grid lines / dots. When I set the layout to grid lines I don’t need lines when in the schematic so I have to keep turning them on/off.

These items have been reported to our development team.

5. When trying to change a property setting on a part which has several sections like a 7400 logic chip there is an error stating the “_REFDES” is in use, this is because each section uses the same reference with an appended letter. This error needs to be removed or fix it so when the subsection is added it appends the letter to the part’s property “_REFDES” and not just append the letter on the screen.

Issue reported to development 5/10/2012. This will be fixed in the next release.

6. Not sure if there is any size stipulations when the part symbols are created but I have noticed some appear to be created larger then necessity, as in a SPST switch that is 10 units long and could have been 6-8 making it look larger then needed. I have no problem making and modifying parts but I then have to keep the parts LIB in sync on 2 computers.

7. A lot of the parts have dual numbers on the pins. The 7402 NOR chip for example has a 1,2,3 for the logic gate and 4,5,6 for the pins. One of the logic gate numbers (3) is sitting where the circle for the NOR output marking belongs, covering it up so it looks like a OR gate on the drawing. How can these be hidden on a global basis?.

8. I have selected connectors like a 20 pin dual inline .100 connector and found that it had the odd and even numbers on the wrong side compared to a standard plug resulting in a redesign after inspection. I placed a MCU and found the pin designations were not in the standard order as on the actual chip. A chip is numbered in a circular pattern around the chip but the symbol was 1-9 top to bottom on the left then 10-18 top to bottom on the right causing confusion when comparing it to the manufactures drawing. I guess I assume too much even on the simple things to be right.

Please feel free to edit the parts using the symbol editor. The parts are all provided by Accelerated Designs. I will pass along the feedback ot our product manager.

9. Is there a list of predefined macros for things like setting the date in the schematic LAST REVISION date field? The layout drawing automatically displays the current date every time it is printed and I’d like to be able to have it in the schematic also, even the current time if needed.

Not that I am aware of but I will check with development.

10. Why can’t “port pins” and nets be combined on the schematic side like in the layout side? Why can’t I drop a “Port Pin” with the same name as a net and have the two become one? Such as when in the layout I assign a pin to GND port then go to the schematic side and drag the port to the net GND and get “ two ports not allowed”? It’s the same net since it was connected in the layout.

Enhancement request submitted to development.

Bill of materials:
Can this section be configured to choose which fields are included?

You can right click on the labels for almost all of the columns to hide them. In this same context menu you have the option to display columns for any of the exisisting schematic symbol properties.

Thanks for all of your feed back. It is rare to see such a detailed list of suggestions and issue reports. I will pass your information along to our development team.

[Sal Hernandez]

I would like to add to the list:

Creating footprints, at one time a person could move a block of pads and/or holes to line up on either the x or y axis all in one fell swoop. this made it easier to create footprints. now each has to be done one at a time.

You can still move a group of pins in the footprint editor. Could you please explain the issue your are having? Please provide the steps to reproduce the issue so I can report to our development team.

[Sal Hernandez]

Updated my original reply above with the following.


When moving a wire the connection dot where the wire is does not move with the new connection point. To move it I have to delete the wire and re-draw it resulting in the removal of the layout trace on the board. This is also true with the “port pins” if they are in one spot on the wire and moved to a new location for clarity the connection point doesn’t move. So my drawings end up with connection dots in the wrong spot and others not showing where the actual connection point is located.

In this situation you are also able to move the connection point. Drag a box around the connection point and the group of wires along with the connection point. You can then move the connection point to the desired location.


Bill of materials:
Can this section be configured to choose which fields are included?

You can right click on the labels for almost all of the columns to hide them. In this same context menu you have the option to display columns for any of the exisisting schematic symbol properties.

[daduggan]

Thanks for the replies. I tried the bill of materials and found what you said, very nice. I did the dot move and that helped, but if two parts are connected to say the ground wire with the wire running from part 1 to part 2 then to ground and you grab the wire between the two parts (that is already ground for both) and move it on top of the ground wire to create two seperate runs one from each part to ground then how do you create a connection point there where the two wires are now overlaping? If that makes sense to you.

[Sal Hernandez]

Since you can't add connection points maybe you can try using port to make connections between nets in place of running wires between every pin. Here is a post that explains using ports.

post46.html?hilit=ports#p46

[Sal Hernandez]

In version 16 this can be done. Not version 19
creating and aligning footprint pads/pins

1) for the sake of example, place 5 pins in somewhat random alignment below the center point.
2) do the same only above the center point.
3) using mouse, select the lower 5 pins.
4) right click on one of the pins to get the properties menu.
5) in previous versions a person could then set either the x or y coordinates.
this would line up those pins on that axis.
- the pin location section is grayed out. -
6) then the same could be done with the upper set of pins.

Thanks for the follow up. I will submit the issue to our development team.