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Vias on top of pads

PostPosted: Tue Nov 06, 2012 9:06 am
by kane
I have a .DRU (design rules) files from Sunstone (sunstone-valueproto.dru) that has a required 7mil gap between vias and pads of the same signal. Does this mean that I cannot place vias directly on top of pads of the same net?


Re: Vias on top of pads

PostPosted: Wed Nov 07, 2012 6:40 am
by Sal Hernandez
You can place vias directly on top of pads if the two are connected to the same net. When placing a via on top of an SMT pad you could experience solder wicking during assembly. The document linked below from our partner company Screaming Circuits provides more information on the topic.


Re: Vias on top of pads

PostPosted: Mon Dec 30, 2013 11:54 am
by danatdst
The aforementioned document from Screaming Circuits, "Via_In_Pad_Guidelines", recommends the following best practice:

"Have your board fab house plug the via and then plate copper over it. They can plug with metal or a thermally and electrically conductive epoxy before the final plating steps."

What is the appropriate method to communicate to Sunstone which vias should be handled this way?


Re: Vias on top of pads

PostPosted: Thu Jan 02, 2014 6:43 am
by Sal Hernandez
A drill drawing note or fabrication drawing note should be fine. If a particular hole size or component's vias should be filled you can specify the size, reference designators, and general location in text on one of the layers mentioned to let our Custom Quote team know that you need filled vias. Filled vias are only available through our Custom Quote service.